This lecture introduces directory-based cache coherence as a solution when traditional snooping protocols become unpractical for large shared-memory systems. Instead of broadcasting every update, these architectures use a specialized data structure called a directory to keep track of which processors hold copies of specific memory blocks and monitor their states. This directory can be centralized in one place or distributed across different memory modules. The lecture goes on to explore specific protocols for managing these directories and covers the fundamentals of programming in shared memory environments—credits: Gemini.
These three approaches represent different ways to ****structure directory data for cache coherence:
Full-map Directories: Maintain an $N$bit vector for every memory block, where $N$ equals the total number of processors in the system. Each bit corresponds directly to a specific processor, allowing the directory to track up to $N$ simultaneous cached copies of a block.
Formula: Total Directory Pointers = Number of Memory Blocks $\times$ Number of Processors. While comprehensive, the directory size grows linearly with the number of processors.

Limited Directories: Store a fixed, maximum number of pointers in each directory entry, completely independent of the total system processor count.
Formula: Total Directory Pointers = Number of Memory Blocks $\times$ Fixed Limit of Pointers. This significantly reduces the directory size overhead by strictly restricting the number of simultaneous cached copies a memory block can have at any given time.

Chained Directories: Distribute the directory structure directly among the caches themselves to emulate a full-map system. It tracks shared copies by maintaining a linked chain of directory pointers from memory through the sharing caches.
Formula: Total Central Directory Pointers = Number of Memory Blocks $\times$ 1. This solves the directory size problem without restricting the maximum number of shared block copies.

Directory-based invalidate protocols manage cache coherence by tracking shared blocks and invalidating stale copies when a processor writes to memory. The lecture categorizes these into three main protocols:
Centralized Directory Invalidate

Centralized Directory Invalidate - Write by P3
Scalable Coherent Interface (SCI)

Scalable Coherent Interface (SCI)-Sharing list addition